C Microkernel Realtime eXecutive
Realtime Operating System for Cortex-M based microcontrollers
 
Loading...
Searching...
No Matches

Full RISC-V trap context frame. More...

Data Fields

uint32_t ra
 
uint32_t t0
 
uint32_t t1
 
uint32_t t2
 
uint32_t a0
 
uint32_t a1
 
uint32_t a2
 
uint32_t a3
 
uint32_t a4
 
uint32_t a5
 
uint32_t a6
 
uint32_t a7
 
uint32_t t3
 
uint32_t t4
 
uint32_t t5
 
uint32_t t6
 
uint32_t s0
 
uint32_t s1
 
uint32_t s2
 
uint32_t s3
 
uint32_t s4
 
uint32_t s5
 
uint32_t s6
 
uint32_t s7
 
uint32_t s8
 
uint32_t s9
 
uint32_t s10
 
uint32_t s11
 
uint32_t mepc
 
uint32_t mstatus
 
uint32_t _pad [2]
 
uint32_t r0123 [4]
 
uint32_t r12
 
void(* lr )(void)
 
void * pc
 
uint32_t xpsr
 

Detailed Description

Full RISC-V trap context frame.

Exception frame without FPU context saved.

Saved on the thread stack by every trap entry (timer ISR, exception handler) and restored on trap exit. When a context switch swaps SP between save and restore, the restore operates on the new thread's frame, launching it transparently.

Initial thread stacks are populated with this same layout by os_thread_populate_stack().

Field Documentation

◆ _pad

uint32_t ExceptionFrame::_pad[2]

◆ a0

uint32_t ExceptionFrame::a0

◆ a1

uint32_t ExceptionFrame::a1

◆ a2

uint32_t ExceptionFrame::a2

◆ a3

uint32_t ExceptionFrame::a3

◆ a4

uint32_t ExceptionFrame::a4

◆ a5

uint32_t ExceptionFrame::a5

◆ a6

uint32_t ExceptionFrame::a6

◆ a7

uint32_t ExceptionFrame::a7

◆ lr

void(* ExceptionFrame::lr) (void)

◆ mepc

uint32_t ExceptionFrame::mepc

◆ mstatus

uint32_t ExceptionFrame::mstatus

◆ pc

void* ExceptionFrame::pc

◆ r0123

uint32_t ExceptionFrame::r0123[4]

◆ r12

uint32_t ExceptionFrame::r12

◆ ra

uint32_t ExceptionFrame::ra

◆ s0

uint32_t ExceptionFrame::s0

◆ s1

uint32_t ExceptionFrame::s1

◆ s10

uint32_t ExceptionFrame::s10

◆ s11

uint32_t ExceptionFrame::s11

◆ s2

uint32_t ExceptionFrame::s2

◆ s3

uint32_t ExceptionFrame::s3

◆ s4

uint32_t ExceptionFrame::s4

◆ s5

uint32_t ExceptionFrame::s5

◆ s6

uint32_t ExceptionFrame::s6

◆ s7

uint32_t ExceptionFrame::s7

◆ s8

uint32_t ExceptionFrame::s8

◆ s9

uint32_t ExceptionFrame::s9

◆ t0

uint32_t ExceptionFrame::t0

◆ t1

uint32_t ExceptionFrame::t1

◆ t2

uint32_t ExceptionFrame::t2

◆ t3

uint32_t ExceptionFrame::t3

◆ t4

uint32_t ExceptionFrame::t4

◆ t5

uint32_t ExceptionFrame::t5

◆ t6

uint32_t ExceptionFrame::t6

◆ xpsr

uint32_t ExceptionFrame::xpsr