scb.h

#pragma once
#include <RTE_Components.h>
#include CMSIS_device_header
 
#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)
 
/* ARMv6M and ARMv8M-Baseline: no detailed fault status registers */
#   define SCB_CFSR 0
 
#else
 
/* ARMv7M, ARMv7EM, ARMv8M-Mainline: full fault status registers */
#   define SCB_CFSR (SCB->CFSR)
 
 
#   define SCB_CFSR_IACCVIOL (SCB_CFSR_IACCVIOL_Msk)
#   define SCB_CFSR_DACCVIOL (SCB_CFSR_DACCVIOL_Msk)
#   define SCB_CFSR_MMARVALID (SCB_CFSR_MMARVALID_Msk)
 
#endif
 
#define SCB_ICSR (SCB->ICSR)
#define SCB_ICSR_PENDSVSET (SCB_ICSR_PENDSVSET_Msk)
#define SCB_ICSR_PENDSVCLR (SCB_ICSR_PENDSVCLR_Msk)
 
 
#define cortex_disable_interrupts __disable_irq
#define cortex_enable_interrupts __enable_irq